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Verifiable Delay Function

Definition

A Verifiable Delay Function is a cryptographic proof that demonstrates a specific computation has been performed sequentially for a minimum amount of time. This cryptographic primitive generates a unique output after a predetermined, non-parallelizable computation, making it inherently difficult to speed up through parallel processing. Critically, once the computation is complete, the correctness of the output can be verified almost instantly. VDFs are designed to ensure that a certain amount of real-world time has elapsed before a result is known, regardless of computational power.