
Briefing
Ligetron addresses the critical problem of deploying zero-knowledge succinct non-interactive arguments of knowledge (ZK-SNARKs) for large computations on commodity hardware by introducing a novel system that achieves sublinear space complexity. The foundational breakthrough lies in utilizing WebAssembly (WASM) as an intermediate representation, enabling on-the-fly circuit generation and dynamic memory management through its inherent semantics. This approach significantly reduces the prover’s memory footprint, allowing ZK-SNARKs to scale to billions of gates and operate efficiently within web browsers, thereby democratizing access to privacy-preserving and verifiable computation for future blockchain architectures.

Context
Before this research, existing concretely efficient ZK-SNARKs faced significant limitations, primarily characterized by prohibitively high prover running times and substantial memory consumption, often scaling linearly with circuit size. These constraints prevented their practical deployment for large-scale computations on resource-limited devices or standard commodity hardware. Furthermore, many efficient ZK-SNARK constructions relied on public-key assumptions, rendering them vulnerable to quantum attacks and often necessitating a trusted setup process, which posed a significant barrier to widespread, trustless adoption in decentralized systems.

Analysis
Ligetron’s core mechanism redefines how NP statements are processed for zero-knowledge proofs. Instead of the conventional approach of flattening computations into a Rank-1-Constraint-System (R1CS) prior to proof generation, Ligetron directly interprets WebAssembly (WASM) code. This allows for the “on-the-fly” generation of the arithmetic circuit and its constraints during runtime. The key innovation is that WASM’s stack-based operational semantics enable effective garbage collection of intermediate wire values.
As values are popped from the WASM stack, their corresponding encodings in the proof system are “freed,” ensuring that the prover’s memory usage is proportional only to the active values on the stack, rather than the entire extended witness of the circuit. This fundamentally differs from previous methods by avoiding the need to store the complete circuit in memory, thus achieving sublinear space complexity. Ligetron builds upon the Ligero proof system, employing collision-resistant hash functions to ensure plausible post-quantum security and transparency, eliminating the requirement for a trusted setup.

Parameters
- Core Concept ∞ WebAssembly Semantics for On-the-Fly Circuit Generation
- System Name ∞ Ligetron
- Base Protocol ∞ Ligero Proof System
- Key Authors ∞ Ruihan Wang, Carmit Hazay, Muthuramakrishnan Venkitasubramaniam
- Scalability ∞ Up to 10 billion gates (c6i), 1 billion gates (browser)
- Space Efficiency ∞ Sublinear (proportional to WASM stack, not full circuit size)
- Post-Quantum Security ∞ Yes (relies on collision-resistant hash functions)
- Transparency ∞ No trusted setup
- Prover Performance (Single Instance) ∞ 500ns/gate (c6i), 3.5µs/gate (browser)
- Verifier Performance (Single Instance) ∞ 250ns/gate (c6i), 1.5µs/gate (browser)
- Prover Performance (Batched) ∞ 60ns/gate (c6i), 1µs/gate (browser)
- Verifier Performance (Batched) ∞ 3ns/gate (c6i), 15ns/gate (browser)